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Real-Time systems and processing - 4EUS4STR

  • Number of hours

    • Lectures 14.0
    • Projects -
    • Tutorials 6.0
    • Internship -
    • Laboratory works 42.0
    • Written tests -

    ECTS

    ECTS 5.0

Goal(s)

Understand the general principles of hardware architectures, host of embedded systems and real-time applications.

  • Operation of programmed systems: from software application to electrical control.
  • Optimization: minimizing resource requirements (computing and storage capacity, energy consumption, environmental impact).
  • Interrupt paradigm: basic tool for real-time systems.
  • Coding complex applications: resource operating system.

Responsible(s)

Mathias VOISIN FRADIN

Content(s)

"Equipment architecture and Software architecture for embedded systems" Part :
Lecture Course (18H) :

  • number state,
  • basic computer structure,
  • processor structure
  • Peripherals I/O
  • main evolution and architecture (DSP-mC-IPs),
  • language level and programming (IDE).
  • task definition,
  • external events management,
  • interrupt service routine organisation (PIC example),
  • task schedduling
  • synchronisation and communication between task
  • Real Time Operating System (VxWorks)

    Real time computing lab works on DSP TMS320C5515 and PC Pentium 4 (30H)
  • DSP part : ISR(task's priority), IDE with C language (Code Composer Studio) Real monitor testing
  • Real time OS part : Training on IDE Workbench VxWorks (task scheduling, semaphores of synchronization and mutual exclusion, queue). Set up of kernel relating with the target. Analyze of context's commutations (graphic tool Viewer)

Bibliographie :
"real time systems" Jane W. S. Liu Prentice Hall
"structured computer organization" M. Tanenbaum Prentice Hall

"Digital Processing for DSP" part (12H) :

  • floatting point DSP
  • Optimisation on algorithm (circular addressing, SIMD processing Unit ...)
  • filtering implemantation
  • use of FFT algorithm

Test

Session normale / First session
Evaluation Rattrapable (ER) / ER assessment :70%
(contrôles individuels en temps limité en séance / Individual tests in limited time in class)
Evaluation Non rattrapable (EN)/ EN assessment: 30%
(rapports de BE, rendus de code, démonstrations / BEreport, code submission, demonstrations

Session de rattrapage / Second session:
La note de session de rattrapage remplace la note de ER. Le EN n'est pas rattrapable/ The new mark will replace the first one (ER). No resitting for the EN exam.

Moyenne de l’UE / Course Unit assessment = 70% ER + 30% EN

Calendar

The course exists in the following branches:

see the course schedule for 2024-2025

Additional Information

Course ID : 4EUS4STR
Course language(s): FR

You can find this course among all other courses.

Bibliography

"real time systems" Jane W. S. Liu Prentice Hall
"structured computer organization" M. Tanenbaum Prentice Hall
'Architecture de l'ordinateur' M. Tanenbaum DUNOD
'Informatique industrielle' M. Nussbaumer Presse polytechnique (Tome I, II et III)
'Architecture des systèmes d'exploitation' M. Griffiths et M. Vayssade
'Gestion des processus industriels temps réel' Jean-Jacques MONTOIS Ellipses

French State controlled diploma conferring a Master's degree

diplôme conférant grade de master contrôlé par l'Etat

Version française

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